TSL1301 102 1 linear sensor array with hold taos006b june 2001 1 www.taosinc.com copyright 2001, taos inc. 102 1 sensor-element organization 300 dots-per-inch (dpi) sensor pitch high sensitivity output referenced to ground excellent high-temperature dark signal characteristics operation to 2 mhz single 5-v supply description the TSL1301 linear sensor array consists of a 102 1 array of photodiodes, associated charge amplifier circuitry, and a pixel data-hold function that provides simultaneous-integration start and stop times for all pixels. the pixels measure 85 m m by 77 m m with 85- m m center-to-center spacing and 8- m m spacing between pixels. operation is simplified by internal control logic that requires only a serial-input (si) signal and a clock. the TSL1301 is intended for use in a wide variety of applications including mark and code reading, ocr and contact imaging, edge detection and positioning, and optical encoding. functional block diagram 1 2 si clk 102-bit shift register q102 switch control logic integrator reset _ + pixel 1 pixel 2 pixel 102 pixel 3 sample/ output analog bus output amplifier 6,7 gain trim q3 q2 q1 v dd 4 3 r l (external load) ao hold texas advanced optoelectronic solutions inc. 800 jupiter road, suite 205 plano, tx 75074 (972) 673-0759 1 2 3 4 8 7 6 5 si clk ao v dd nc gnd gnd nc (top view) nc no internal connection
TSL1301 102 1 linear sensor array with hold taos006b june 2001 2 www.taosinc.com copyright 2001, taos inc. terminal functions terminal description name no. description ao 3 analog output clk 2 clock. the clock controls charge transfer, pixel output, and reset. gnd 6, 7 ground (substrate). all voltages are referenced to the substrate. nc 5, 8 no internal connection si 1 serial input. si defines the start of the data-out sequence. v dd 4 supply voltage. supply voltage for both analog and digital circuits. detailed description the sensor consists of 102 photodiodes arranged in a linear array. light energy impinging on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. during the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. the amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time. the output and reset of the integrators is controlled by a 102-bit shift register and reset logic. an output cycle is initiated by clocking in a logic 1 on si. an internal signal, called hold, is generated from the rising edge of si and transmitted to analog switches in the pixel circuit. this causes all 102 sampling capacitors to be disconnected from their respective integrators and starts an integrator reset period. as the si pulse is clocked through the shift register, the charge stored on the sampling capacitors is sequentially connected to a charge-coupled output amplifier that generates a voltage on analog output ao. simultaneously, during the first 18 clock cycles, all pixel integrators are reset, and the next integration cycle begins on the 19th clock. on the 103rd clock rising edge, the si pulse is clocked out of the shift register and the analog output ao assumes a high impedance state. note that this 103rd clock pulse is required to terminate the output of the 102nd pixel, and return the internal logic to a known state. a subsequent si pulse may be presented as early as the 104th clock pulse, thereby initiating another pixel output cycle. ao is driven by a source follower that requires an external pulldown resistor. when the output is not in the output phase, it is in a high-impedance state. the output is nominally 0 v for no light input and 2 v for a nominal white-level output, with a nominal full-scale (saturation) voltage of 3 v. the TSL1301 is intended for use in a wide variety of applications, including: image scanning, mark and code reading, optical character recognition (ocr) and contact imaging, edge detection and positioning, and optical linear and rotary encoding.
TSL1301 102 1 linear sensor array with hold taos006b june 2001 3 www.taosinc.com copyright 2001, taos inc. absolute maximum ratings 2 supply voltage, v dd 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital input current range, i i 20 ma to 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperature range, t a 0 c to 70 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 25 c to 85 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions (see figure 1 and figure 2) min nom max unit supply voltage, v dd 4.5 5 5.5 v input voltage, v i 0 v dd v high-level input voltage, v ih v dd 0.7 v dd v low-level input voltage, v il 0 v dd 0.3 v wavelength of light source, l 400 1000 nm clock frequency, f clock 5 2000 khz sensor integration time, t int 0.0425 100 ms setup time, serial input, t su(si) 20 ns hold time, serial input, t h(si) (see note 1) 0 ns operating free-air temperature, t a 0 70 c note 1: si must go low before the rising edge of the next clock pulse. ???????????????????? ???????????????????? ???????? ???????? 18 clock cycles 103 clock cycles clk si ao internal reset integration hi-z hi-z not integrating integrating figure 1. timing waveforms
TSL1301 102 1 linear sensor array with hold taos006b june 2001 4 www.taosinc.com copyright 2001, taos inc. electrical characteristics at f clock = 200 khz, v dd = 5 v, t a = 25 c, l p = 565 nm, t int = 5 ms, r l = 330 w , e e = 800 nw/cm 2 (unless otherwise noted) (see note 2) parameter test conditions min typ max unit analog output voltage (white, average over 102 pixels) 1.6 2 2.4 v analog output voltage (dark, average over 102 pixels) e e = 0 0 0.3 0.4 v prnu pixel response nonuniformity pixels 2101, see note 3 10% nonlinearity of analog output voltage see note 4 0.5% fs output noise voltage e e = 0, see note 5 3 mvrms saturation exposure see note 6 5.45 7 nj/cm 2 analog output saturation voltage 3 3.5 v dsnu dark signal nonuniformity all pixels, see note 7 e e = 0 0.04 0.12 v il image lag see note 8 1% i dd supply current 2.5 4 ma i ih high-level input current v i = v dd 10 m a i il low-level input current v i = 0 10 m a c i input capacitance 5 pf notes: 2. clock duty cycle is assumed to be 50%. 3. prnu is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of th e device under test when the array is uniformly illuminated. 4. nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent of analog output voltage (white). 5. rms noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period. 6. minimum saturation exposure is calculated using the maximum responsivity and minimum output saturation voltage figures. 7. dnsu is the difference between the maximum and minimum of dark-current voltage. 8. image lag is a residual signal left in a pixel from a previous exposure. it is defined as a percent of white-level signal rem aining after a pixel is exposed to a white condition followed by a dark condition: il v ao v ao(dark) v ao(white ) v ao(dark) 100
TSL1301 102 1 linear sensor array with hold taos006b june 2001 5 www.taosinc.com copyright 2001, taos inc. operating characteristics over recommended ranges of supply voltage and operating free-air temperature (see figure 2) parameter test conditions min typ max unit t w(h) clock pulse duration (high) 50 ns t w(l) clock pulse duration (low) 50 ns t s analog output settling time to 1% r l = 330 w , c l = 50 pf 350 ns 50% ao si clk pixel 102 t s 0 v 0 v 5 v 2.5 v t h(si) 5 v t su(si) t w 1 2 102 103 t s pixel 1 figure 2. operational waveforms typical characteristics 0.4 0 300 500 700 900 0.6 0.8 photodiode spectral responsivity 0.2 l wavelength nm normalized responsivity t a = 25 c 1 1100 400 600 800 1000 figure 3
TSL1301 102 1 linear sensor array with hold taos006b june 2001 6 www.taosinc.com copyright 2001, taos inc. mechanical information this dual-in-line package consists of an integrated circuit mounted on a lead frame and encapsulated with an electrically nonconductive clear plastic compound. 0.410 (10,41) 0.430 (10,92) 0.014 (0,36) 0.016 (0,41) 0.040 (1,02) 0.060 (1,52) 0.015 (0,38) 0.025 (0,64) 8 max typ 90 105 seating plane 0.008 (0,20) 0.012 (0,30) 0.240 (6,10) 0.260 (6,60) 5 8 4 1 10 typ 8 places 0.020 (0,51) r nom 4 places c l 0.100 (2,54) t.p. 2 0.155 (3,94) 0.175 (4,45) 0.060 (1,52) 0.075 (1,91) 0.125 (3,18) 0.150 (3,81) 0.043 (1,09) 0.053 (1,35) 0.053 (1,35) 0.067 (1,70) 0.020 (0,51) r max 4 places 0.290 (7,37) 0.310 (7,87) 0.030 (0,76) d nom pin 1 si pin 2 clk pin 3 ao pin 4 v dd pin 5 nc pin 6 gnd pin 7 gnd pin 8 nc centerline of pin 1 nominally lies between pixels 7 and 8. c l 0.021 (0,53) (pixel) 0.290 (7,37) 0.310 (7,87) 0.390 (9,91) 3 8 places 2 true position when unit is installed 3 minimum flat-optical-surface length notes: a. all linear dimensions are in inches and parenthetically in millimeters. b. this drawing is subject to change without notice. c. index of refraction of clear plastic is 1.55. figure 4. packaging configuration
TSL1301 102 1 linear sensor array with hold taos006b june 2001 7 www.taosinc.com copyright 2001, taos inc. production data e information in this document is current at publication date. products conform to specifications in accordance with the terms of texas advanced optoelectronic solutions, inc. standard warranty. production processing does not necessarily include testing of all parameters. notice texas advanced optoelectronic solutions, inc. (t aos) reserves the right to make changes to the products contained in this document to improve performance or for any other purpose, or to discontinue them without notice. customers are advised to contact taos to obtain the latest product information before placing orders or designing taos products into systems. taos assumes no responsibility for the use of any products or circuits described in this document or customer product design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that the circuits are free of patent infringement. taos further makes no claim as to the suitability of its products for any particu lar purpose, nor does taos assume any liability arising out of the use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. texas advanced optoelectronic solutions, inc. products are not designed or intended for use in critical applications in which the failure or malfunction of the taos product may result in personal injury or death. use of taos products in life support systems is expressly unauthorized and any such use by a customer is completely at the customer's risk. taos, the taos logo, and texas advanced optoelectronic solutions are trademarks of texas advanced optoelectronic solutions incorporated.
TSL1301 102 1 linear sensor array with hold taos006b june 2001 8 www.taosinc.com copyright 2001, taos inc.
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